74LS90 – Decade and Binary Counters

74LS90 Information is available here.

Part Number : 74LS90

Function : This is a kind of semiconductor, Decade and Binary Counters.

Pinouts :

Package :

Manufacturer : Fairchild Semiconductor

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74LS90 データシート

Some text files in PDF file :

DM74LS90 Decade and Binary Counters August 1986 Revised March 2000 DM74LS90 Decade and Binary Counters General


Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-by-five for the DM74LS90. All of these counters have a gated zero reset and the DM74LS90 also has gated set-to-nine inputs for use in BCD nine’s complement applications. To use their maximum count length (decade or four bit binary), the B input is connected to the QA output. The input count pulses are applied to input A and the outputs are as described in the appropriate truth table. A symmetrical divide-by-ten count can be obtained from the DM74LS90 counters by connecting the QD output to the A input and applying the input count to the B input which gives a divide-by-ten square wave at output QA.


s Typical power dissipation 45 mW s Count frequency 42 MHz Ordering Code: Order Number DM74LS90M DM74LS90N Package Number M14A N14A Package


14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Reset/Count Truth Table Reset Inputs R0(1) H H X X L L X R0(2) H H X L X X L R9(1) L X H X L X L R9(2) X L H L X L X QD L L H Output QC L L L QB L L L QA L L H COUNT COUNT COUNT COUNT © 2000 Fairchild Semiconductor Corporation DS006381 www.fairchildsemi.com DM74LS90 Function Tables BCD Count Sequence (Note 1) Count QD 0 1 2 3 4 5 6 7 8 9 L L L L L L L L H H QC L L L L H H H H L L Output QB L L H H L L H H L L QA L H L H L H L H L H Logic Diagram Bi-Quinary (5-2) (Note 2) Count QA 0 1 2 3 4 5 6 7 8 9 H = HIGH Level L = LOW Level X = Don’t Care Note 1: Output QA is connected to input B for BCD count. Note 2: [ … ]

74LS90 PDF File

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