1442 – Bulk Metal Foil Technology Dual-In-Line Hermetic Resistor Networks

1442 Datasheet PDF learn more.

Part number : 1442

Functions : This is a kind of semiconductor, Bulk Metal Foil Technology Dual-In-Line Hermetic Resistor Networks.

Pin arrangement :

Package information :

Manufacturer : Vishay Siliconix

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1442 Datasheet PDF

The texts in the PDF file :

1442, 1445, 1446 Vishay Foil Resistors Bulk Metal® Foil Technology Dual-In-Line Hermetic Resistor Networks Vishay Model 1442, 1445 and 1446 networks incorporate all the performance features of Vishay Bulk Metal® Foil technology. The 8, 14 and 16 pin side brazed DIPs are a ceramic package. Ceramic has the advantage of electrical isolation on the underside, and, in DIP form, a favorable pin arrangement when two networks are to be placed side by side and connected together. Review data sheet “7 Technical Reasons to Specify Bulk Metal® Foil Resistor Networks.” Networks are built to your requirements. Send your schematic and electrical requirements to the Applications Engineering Department. (See data sheet “Network Worksheet.”) A unique part number will be assigned which defines all aspects of your network. THROUGH HOLE Product may not be to scale FIGURE 1 – PACKAGE SIZES AND CHARACTERISTICS L B 0.200 MAXIMUM (5.08) LL 0.008 to 0.016 (0.20 to 0.41) 0.300 ±0.010 (7.62 ±0.25) W NOTE: 1. 2. 3. NO. 1 LEAD These networks utilize Vishay Bulk Metal® Foil resistor chips V5X5 and V15X5 or VTF15X5 Thin Film chips. The V5X5 and V15X5 chips have maximum resistance values of 10K and 33K respectively in Bulk Metal® Foil and 500K in VTF15X5 Thin Film chips. The V5X5 and V15X5 chip(s) can be intermixed in a package. NO. OF PINS 8 14 16 L 0.520 ±0.020 (13.21 ±0.51) MAXIMUM DIMENSIONS in Inches (mm) W B 0.295 ±0.010 (7.49 ±0.025) 0.054 (1.37) 0.046 (1.17) LL CHIP CAPACITY MAXIMUM POWER RATING V5X5 V15X5 (WATTS) @ +70°C 12 30 36 4 10 12 0.4 1.2 1.4 0.015 to 0.022 (0.38 to 0.56) 0.100 TYPICAL (2.54) VISHAY MODEL 1442 1445 1446 0.125 minimum (3.18) 0.135 +0.015/–0.010 (3.43 +0.38/–0.25) 0.740 ±0.045 0.270 +0.035/–0.030 (18.80 ±1.14) (6.86 +0.89/–0.76) 0.780 ±0.030 (19.81 ±0.76) 0.290 ±0.008 (7.37 ±0.20) 0.040 to 0.070 0.135 +0.015/–0.010 (1.01 to 1.78) (3.43 +0.38/–0.25) FIGURE 2 – SAMPLE CIRCUIT DESIGN AND CHIP LAYOUT 7 6 8 8 5 7 6 5 NOT [ … ]

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